This is the list of the included files: MCC.sdf This is the file that contains all Pin definitions. All pins of the chip are ordered starting from the bottom left corner and are ordered anticlockwise. The file contains only signal pins and not the power supply pins. There are 77 signal pins, 8 power and ground pins and one pin that does not need to be connected or tested (Bias) totalling 94. There are 2 (LVDS) clocks that have to be connected to the chip in order to make it work properly (CKn, CKp, XCKINn, XCKINp). MCC-I2_IO Delta.xls Excel file containing detailed Pad positions. 1) Scan Chain Test (3 files). These files are with a clock frequency of 10 MHz. ScanChain_0.vec ScanChain_1.vec ScanChain_2.vec 2) Functional Test Vectors sampling at 40 MHz (5 files) Delta_01.vec Delta_02.vec Delta_03.vec Delta_05.vec Delta_08.vec 3) Functional test Vector sampling at 80 MHz (1 file) Delta_06.vec 4) Delay Line measurement (1 file) Delta_07.vec [PLEASE DO NOT CONSIDER THIS TEST FOR REJECTING CHIPS] With this test you need to measure a certain number of delays between a clock edge and the leading edge of the STRO signal which is Pin #70 (100 measurements). In the file before each measurement there are the following comment lines containing: # # Measure timing of rising edge of pin #70 starting from here # 5) Voltage sweep (1 file) Delta_04.vec [PLEASE DO NOT CONSIDER THIS TEST FOR REJECTING CHIPS] Here you have to measure failures of the Test Pattern changing the voltage of the chip, sweeping from 1.7 V up to 2.2 V in a step of 10 mV (50 measurements) 6) Input voltage and Output Voltage measurements (1 file) Delta_09.vec In this test vector we want to measure output levels for the following pins: DAO, DTOp, DTOn, DTO2p, DTO2n, LV1p, LV1n, SYNCp, SYNCn, CCK, CCKA, LD and LDA. DTOp, DTOn, DTO2p, DTO2n, LV1p, LV1n SYNCp, SYNCn are LVDS signals. DAO, CCK, CCKA, LD and LDA are CMOS signals. In order to measure the levels we have to stop only four times: at time 6662.00 ns: DTOn, DTO2n, LV1n and SYNCp are high. DAO, DTOp, DTO2p, LV1p, SYNCn, CCK, CCKA, LD and LDA are low. at time 12437.00 ns: DTOp, DTO2p, LV1n and SYNCn are high. DAO, DTOn, DTO2n, LV1n, SYNCp, CCK, CCKA, LD and LDA are low. at time 12712.00 ns: DAO, DTOn, DTO2n, LV1n, SYNCn, CCK, CCKA, LD and LDA are high. DTOp, DTO2p, LV1p, and SYNCp are low. at time 32537.00 ns: DTOn, DTO2n, LV1p, and SYNCn are high. DAO, DTOp, DTO2p, LV1n, SYNCp, CCK, CCKA, LD and LDA are low. In the Test Vector file there are comments before each measurement 7) Static Current For this test you can use files Delta_01.vec. For the test, as at startup the current consumption might be higher, i would prefer you to perform the measurement after having turned on the clock for a while. For example you could run half of the test vector and then perform the measurement. 8) Dynamic Current For this test you can use file Delta_01.vec It would be nice to run this files with a clock speed ranging from 0MHz up to 80 MHz for measuring the chip power consumption. If you are not able to run the test up to 80 MHz go up till the maximum frequency you can reach.