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Design Team
R.Beccherle, G.Comes, G.Darbo, P.Denes, P.Fischer,
K.Kloukinas, I.Peric, P.Morettini, P.Musico, C.Schiavi.
Specification Documents
- Specification documents of the MCC-I1 design:
- Introduction [PDF]
- Command Decoder - CMD [PDF]
- Register Bank - REG [PDF]
- Receiver - REC [PDF]
- Event Builder - EVB [PDF]
- Module Port [PDF]
- FE Port [PDF]
- Output data format [PDF]
- Chip size & I/O pads [PDF]
Packaging Infos
- Pin List, Signal Type & Direction, Connection to sytem set-ups [HTML, Excel]
- I/O Pad standard cells and Pin list [HTML, Excel ]
- LDCC-84 Packaging:
Final Design Review (MCC FDR)
- MCC Final Design Review was held on 10th of October 2002. (See agenda).
List of talks and copy of the transparencies:
- G. Darbo - ATLAS Pixel System Architecture [PDF]
- R. Beccherle - Specifications [PDF]
- P. Morettini - Simulation environment [PDF]
- C. Schiavi - Architecture validation and Physics performance [PDF]
- R. Beccherle - Design, synthesis and functional verification [PDF]
- K. Kloukinas - Full custom blocks: SRAM [PDF]
- I. Peric - Full custom blocks: Delay line [PDF]
- G. Darbo - Layout and timing verification [PDF]
- G. Darbo - Chip measurements [PDF]
- G. Gagliardi - Irradiation results [PDF]
- G. Darbo - Issues for MCC-I2 submission [PDF]
Wafer Test at Delta (DK)
3 Wafers WC8P32T (ID#2), WN8P83T (ID#3) and WH8P89T (ID#9) have been tested by Delta (DK) and results of the test (STDF and Text format) are available here. The STDF file has been processed using Galaxy Examinator. Statistics and histograms for the different measured parameters are:

Please address comments or suggestions to: Giovanni Darbo
Last updated: Fri, Dec 20, 2002