Minute of the MCC-DSM Design Meeting held on 9th of January 2003

(Periodic meeting on MCC project progress)

 

 

Present: Roberto Beccherle, Giovanni Darbo, Guido Gagliardi, Paolo Morettini, Carlo Schiavi.

 

 

  1. MCC-I2.

 

After two weeks of little activity, due to end of the year holidays, we met again and we made a status of the project and we discussed about the next steps.

Tools: Interface between SimPix and VCS is now fixed and simulation results are passed between the Verilog (VCS) and SimPix.

Analysis of MCC-I1 known bugs: it is now almost completed. It still remains to be understood the effect of reset to the LV1 counter that is claimed to start with a wrong value after reset.

Design and design validation: we foresee 3 major revision of the Verilog code before MCC-I2 submission:

  • Rev.2 - MCC-I2_NoSEU: This version will implement all the specification changes without replica logics for Register and Command Decoder and EoE encoding inside the ReceiverFIFO. Only behavioural description will be provided (Roberto). SimPix script needs modification to implement the new 8-bit flag generated by the FE-I2, to change the RdFIFO/WrFIFO command to accept the 27-bit data word (instead of 20-bits), to read the new implemented register that reads the content of the PendingLv1FIFO (Paolo). Also the SimPix analysis module must be updated (Paolo). To validate the design it is necessary to write the MCC-I2 C++ model (Carlo) and add/modify the test vectors to validate the chip (Carlo).
  • Rev.3 - MCC-I2_SEU: This will be the final design version that will add redundancy for improving SEU tolerance. First a behavioural will be generated (Roberto) and validated (Carlo). No modification are needed from Rev.2 to Rev.3 for SimPix. Of this version will be generated a netlist by Synopsys (Roberto) that will be validated (Carlo). On this netlist the layout of the MCC-I2 will be generated (Giovanni).
  • Rev.1 and rev.2 should be ready rather soon. The SimPix tools will be ready in parallel, while validation will follow in sequence. Rev.3 is a simple change from rev.2, but some work is needed for generation of the netlist.

    Layout: we decided to follow the same design cycle used for MCC-I1. Even if the new version of Silicon Ensemble generates a better CK tree with smaller skew, we will keep the same 400 ps of hold time protection at level of synthesis. We will not leave Silicon Ensemble to do other optimisation like replacing buffers or other components. We think that the standard cells library is not good enough to do it.

    Schedule: we are aware that the schedule is becoming tight and progress is slower than foreseen. Most of the load is now on Roberto and we will try to reduce some of his testing work. We decided to have a weekly discussion to better follow the progress. Next week we will make a more formal schedule.

    1. Irradiation analysis and new irradiation.

    Guido is working to prepare an ATLAS note on the PS irradiation results. He will release a draft for next week. He will then give priority to next year irradiation campaign.