Test configuration dummy modules:
Measurements on electronics wafers bumped in AMS:
Old layout modules (dummy Si detector + dummy readout chips):
Module 1 (), sent to Milano
Notes: detachment of 6 chips (0 5 6 7 8 15) during shipping from AMS
Module 2 (), sent to Milano
Notes: detachment of 4 chips (0 1 8 15) during shipping from AMS; missing FEs flip-chipped again in Genova
2 not measureble lines: 11/286 open lines (in FE0), 1/286 high R line, 274/286 good lines
Module 3 () thinned electronics, assembled with flex for thermal cycles
1 not measureble line: 0/287 open lines, 287/287 good lines
Module 4 () thinned electronics
Notes: detachment of 1 chip (7) and damage for chip 0 during shipping from AMS
14 not measureble lines: 3/274 open lines (FE0), 4/274 high R lines (FE0), 267/274 good lines
Module 5 (3932-33, el. 3933-02) thinned electronics, sent to LBL
0/288 open lines, 3/288 high R lines, 285/288 good lines
Module 6 (3932-33, el. 3933-06) thinned electronics, sent to LBL
1 not measureble line: 2/287 open lines, 3/287 high R line, 282/287 good lines
Module 7 (3932-32, el. 3933-06) thinned electronics, sent to Bonn
0/288 open lines, 1/288 high R lines, 287/288 good lines
Module 8 (3932-32, el. 3933-07)
18/288 open lines (FE10), 270/288 good lines
Not measured:
Modules 9 and 10 (d. 3932-29, el. 3933-10/08), sent to LBL
Module 11 (d. 3932-28, el. 3933-06) thinned electronics
Modules 12 and 13 (d. 3932-30/31, el. 3933-04/05) thinned electronics
Modules 14 (d. 3932-26, el. 3933-10), sent to Marseille
Modules 15 (d. 3932-26, el. 3933-10)
Modules 16 (d. 3932-31, el. 3933-05) thinned electronics, sent to Marseille
Modules 17 (d. 3932-28, el. 3933-02/05) thinned electronics
Modules 18 (d. 3932-46, el. 3933-14/16) (not in gelpack)
Old measurements (thermal cycles to verify stresses on bumps):
Module 1: test on thermal stresses on bumps.
Module 2: test on thermal stresses on bumps.
Module 1: test on thermal stresses on bumps.
Study of thermal stresses on bumps.
Please address comments or suggestions to: Claudia Gemme
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