IFR Electronics PDR committee's Report Draft 1 July 8 1996 J. Dowdell, M. Levi, S. Madani, P. Matricon, M. Morandin, J. Nash (Editor) *** IFR Report Front End Card (FEC) Final Design Review The IFR Front End Card underwent a Final Design Review. The committee was shown the preproduction FEC, and results based on a preproduction run of 200 FECs. The committee noted that the design and preproduction of the FEC are well advanced, and the committe was satisfied with the progress made by the IFR group in proceeding to production of the FEC. The following are the points the committe felt should be addressed before final production of the FECs begins in the fall. The committee notes that there are a lot of identical, individual connectors on the FEC. It is felt this could make cabling the detector and subsequently checking the cabling difficult to do in a confined space without much light. Of most concern is the fact that the power and shift/load cables could be swapped. The committee feels these two connectors should be different. If the other connectors cannot be different, or merged into a single connector, they should at least be colour coded. The committee accepts that tests have shown that the input amplifier works in the presence of a magnetic field, but if the value of the inductor does not matter the committee are not sure what it actually does. The committee would like a better explanation of the function of the inductor in order to understand why it works in a magnetic field. The self generation of the load signal is potentially dangerous, because the operation of the circuit is not visible, and hence not checkable, from outside. In principle it is better to have the FEC under the complete control of the IFB. So although the committee is not convinced that self generation of the load signal will not work, we are also not convinced that it is necessary (since it only saves one twisted pair in a cable, not a whole cable). The committee strongly recommends that self generation of the load signal not be used. The latency of the level one trigger has been agreed to be 11.5 +/- 0.5ns, but BaBar management will reconfirm this since the IFR groups have asked the question. The committee are not sure whether the time, temperature and voltage stability of the monostables has been presented. If not we would like them to be. It will be necessary to know this in order to specify the safety margin around the nominal trigger window that must be applied to the monostables. It may also have implications of temperature control of the boards (and hence the cooling system). On the subject of cooling: the IFR has a lot of FECs disippating a lot of power in an enclosed area. The committee would like to ensure the scheme for cooling the system is agreed before the FEC is produced, because there may be implications for the FEC, depending on the scheme adopted. For example, exposed copper for heatsinking to the iron may be a requirement. The IR hall will not be air conditioned, but even if it was the committee doubts that that alone would be sufficient cooling for the FECs. These comments apply to the mini-crates as well as the on-detector boards. The committee would like to see shielded cables to and from the FEC (to reduce interference with other systems, especially the calorimeter). Some documents already state that these cables will be shielded, but some do not. This must be sorted before production because, for example, where the shield is connected may have an effect on the FEC. Similarly, the whether a fire protection sheath is wrapped around the cables should be clarified. The IFR groups should convince themselves that there is not a problem if the IFB is powered and driving the cables, but the FEC is unpowered (or visa versa). Will the ESD protection of the receiver damage the output stage of the driver? Similarly, is there a current path from +7V to -5.2V that could cause similar damage if one supply fails? IFR Front-end Electronics PDR The IFR Front-end Electronics underwent a Preliminary Design Review. The Fifo Board (IFB), Calibration Board (ICB), TDC Board (ITB), Crate Controller (ICC) and Point-to-Point Distribution board (PDB) were presented. IFB The committe acknowledged the very significant improvements in the design of the board achieved by the group so far. The functionalities of the module have been correctly identified and coherently implemented in the design. Looking into the details of the board, the committee has agreed on the following comments: - In the current design, the Read Event command performs a check of the trigger tag that it is not necessary at this stage of the data flow. Furthermore such check seems to be the only difference between the Read Event and the Read Fifo comands. Therefore the committee suggests to drop the mismatch check and to redefine the Read Fifo command so that, differently from what happens with the Read Event command, single 64-bot words can be read out from the FIFO when the command is executed. The Read Fifo would then become complementary to the current Write Fifo command. - The IFR group is invited to explore the possibility of reducing the number of MACH devices by using larger units that can lead to a simpler layout of the printed circuit board. - The system clock frequency (59.5 MHz) used to transmit commands is now a well established standard in BaBar, so it is not feasible to rediscuss this choice at this moment. Besides these recommendations the review was also useful in identifying a few points that require further specifications: - The IFB command decoding logic reacts to the Sync and L1 commands before the address has been recognized. This is correct as long as the timing remains the same in both cases. Neverthless it would be desirable that any board in Babar reacted at the same moment with respect to the address decoding sequence but a rule has not yet been defined. - the action to be taken on receipt of a spurios (unknown) command is not currently defined. - The issue of clock speed for command decoding is absolutely fixed at 60 Mhz ICB The committe acknowledged the progress made in the design of the ICB. The materials satisfied the reviewers with respect to conceptual design. The ICB material presented was not yet complete for a PDR and the committee felt that a that a PDR for the ICB should be held when appropriate. The following points were noted by the committee concerning the design. The committee felt that a higher density design should be considered perhaps multiplexing the driver output. The committee would like to understand if it is possible to use the ICB to calibrate the ITB. ICC-PDB Comments on the Design requirements: The committee agrees with the main functional requirements for the ICC and the PDB. However, the requirements with for the timing measurements should be quantified. The committee was concerned that the requirement for 1ns timing precision was more a design goal than a requirement for physics, and that this requirement might therefore be inducing stricter than needed requirements on the clock quality used by the TDCs for a reference. Comments on the Design The committee encourages the ICC-PDB group to test as soon as possible (on the prototype) the feasability of using TTL for clock distribution from the ICC through the PDB and ITB in order to ensure that the final jitter is compatible with the required timing precision at the TDC chip input. Care should be taken that no data is sent to the front ends until both the LINKREADY* and DAV* signals on the GLINK are established as valid. Monitoring the temperature on the ICC board was felt to be useful, but as this card is at the edge of the crate, it was though that the capability of monitoring the temperature near the centre of the crate would also be useful. It was felt that the delays on the ICC board should be fixed rather than be programmable via detector controls. The designers are asked to consider selecting the BaBar standard choice for the monitoring serial link. ITB The IFR Time to Digital Converter Board (ITB) is a new element in the IFR electronics chain recently devised to measure the time-of-arrival of signals. The IFR group has justified the utility of this new function in its use for verifing the event T0, in triggering on cosmic rays, and in rejecting out of time (background) hits. The the committee was impressed by the rapid evolution of the concept for the ITB since the IFR electronics CDR. The committee recognizes that the design is quite new and that the IFR group is still defining the goals and exploring design variants for the ITB. Given the level of maturity of the design the current review of the ITB was considered to be a conceptual design review, a PDR of the ITB will still be required at a later date. Several points were raised by the committee that might further the development of the ITB. 1) The conformance of the ITB to the Babar standard protocol could not be verified, and the IFR group should explore the implications of multiple event readout (asynchronous data collection), the clear readout protocol, and the creation of a synchronized time stamp. The IFR group needs to define the requirements for the data, such as multi-hit capability, and needs to define the data format. 2) The requirement of 0.5 nsec timing accuracy was viewed by the committee as a goal, but not a requirement. Certainly one or two nanosecond accuracy is more than likely adequate. A calibration procedure must be defined that can deliver the required timing accuracy. Although the ITB might be capable of 0.5 nsec accuracy, the complete system must be calibrated and the overall accuracy maybe substantially worse. 3) The integration of the ITB which provides a variable length output format with the IFB which provides a fixed length format is currently unsolved. The mixing of the two data formats is not supported by the Babar standard serial protocol. The committee noted that the ITB and IFB formats could coexist if the maximum length of the ITB data was less than or equal to the fixed length of the IFB format. 4) The number of back-end buffers required to minimize the deadtime should be simulated using an accurate model of the system. The simulation shown to the committee assumed that the read-event is coincident with the trigger. The time to readout and the latency of the trigger and read-event signals needs to be included. The committee was concerned that the deadtime might be much higher than that presented for a single event buffer. 5) The committee notes that the DIRC TDC satisfies all the requirements of the Babar architecture whereas the Christensen TDC may not. The IFR group must verify that the Christensen TDC is in fact in compliance and the committee would like to see the number of different interpretations of the Babar architecture minimized. The committee did not feel that the channel density of this TDC (32/chip) versus that of the DIRC TDC (16/chip) was a compelling reason to eliminate the DIRC TDC from consideration. That decision would have to be made in the light of different packaging options for the DIRC TDC, and different channel densities for the ITB and ICB cards in an overall optimization. The range of operation of the Christensen TDC is 30-60 MHz, given that the point of operation would be 30 or 60 MHz there is a significant risk due to process variation that the provided chips may not operate reliably. High Voltage. The committe would like the designers to verify that the maximum voltage which can appear at the input of the mux is compatible with the tolerance of the mux *****************************************************************************