// ESAF : Euso Simulation and Analysis Framework // $Id: ChipTrackingTrgEngine.hh,v 1.11 2005/04/15 12:21:50 pesce Exp $ // M. Pallavicini created Oct, 24 2003 // tracking built in front end chip logic + macrocell logic // ALGORYTHM: // each chip is capable of finding a track segment of consequtive and adjacent // pixels // if the length of a given segment exceeds a threshold, trigger occurs // if not, the macrocell checks if there are 2 segments in nearby front end // chips that summed together exceed the threshold. if this happens, trigger // occurs // // #ifndef __CHIPTRACKINGTRGENGINE_HH_ #define __CHIPTRACKINGTRGENGINE_HH_ #include "euso.hh" #include "TriggerEngine.hh" #include "ChipTrackSegment.hh" class ChipTrackingTrgEngine : public TriggerEngine { public: // ctor ChipTrackingTrgEngine(); // dtor virtual ~ChipTrackingTrgEngine(); // simulate trigger virtual void Simulate( MacroCellData* ); EsafConfigClass(Electronics,ChipTrackingTrgEngine); private: ClassDef(ChipTrackingTrgEngine,0) // trigger parameters Int_t fThreshold; //threshold on pixel hits in a gtu Int_t fMinTrackLength; //algorithm searches for tracks of length between fMinTrackLength and fMaxTriggerTrackLength Int_t fMaxTrackLength; Int_t fMinTriggerTrackLength; //min trigger track length in a single chip Int_t fMinTriggerTwoLength; //min trigger track length in two nearby chips Bool_t fAcceptHole; //true if we accept an hole in a track in a single chip Bool_t fOnlyWithSignal; //if true processes only chip with signal // clear maps void Clear(); // fill root event void FillEEvent( Int_t ); // dump the number of tracks for each chip void Dump( Int_t ); map > fTrackSegments; //map for storing data }; #endif /* __CHIPTRACKINGTRGENGINE_HH_ */